Freescale Semiconductor /MKV56F24 /XBARA /SEL28

Input (XBARA_INn) to be muxed to XBARA_OUT56 (refer to Functional Description section for input/output assignment)

0 (0): Logic zero

1 (1): Logic one

2 (2): XBAR0_IN2 input pin

3 (3): XBAR0_IN3 input pin

4 (4): XBAR0_IN4 input pin

5 (5): XBAR0_IN5 input pin

6 (6): XBAR0_IN6 input pin

7 (7): XBAR0_IN7 input pin

8 (8): XBAR0_IN8 input pin

9 (9): XBAR0_IN9 input pin

10 (10): XBAR0_IN10 input pin

11 (11): XBAR0_IN11 input pin

12 (12): CMP0 Output

13 (13): CMP1 Output

14 (14): CMP2 Output

15 (15): CMP3 Output

16 (16): FTM0 all channels output compare ORed together

17 (17): FTM0 all channels counter init ORed together

18 (18): FTM3 all channels output compare ORed together

19 (19): FTM3 all channels counter init ORed together

20 (20): PWMA channel 0 trigger 0

21 (21): PWMA channel 0 trigger 1

22 (22): PWMA channel 1 trigger 0

23 (23): PWMA channel 1 trigger 1

24 (24): PWMA channel 2 trigger 0

25 (25): PWMA channel 2 trigger 1

26 (26): PWMA channel 3 trigger 0

27 (27): PWMA channel 3 trigger 1

28 (28): PDB0 channel 1 output trigger

29 (29): PDB0 channel 0 output trigger

30 (30): PDB1 channel 1 output trigger

31 (31): PDB1 channel 0 output trigger

32 (32): High Speed Analog-to-Digital Converter 1 conversion A complete

33 (33): High Speed Analog-to-Digital Converter 0 conversion A complete

34 (34): High Speed Analog-to-Digital Converter 1 conversion B complete

35 (35): High Speed Analog-to-Digital Converter 0 conversion B complete

36 (36): FTM1 all channels output compare ORed together

37 (37): FTM1 all channels counter init ORed together

38 (38): DMA channel 0 done

39 (39): DMA channel 1 done

40 (40): DMA channel 6 done

41 (41): DMA channel 7 done

42 (42): PIT trigger 0

43 (43): PIT trigger 1

44 (44): Analog-to-Digital Converter 0 conversion complete

45 (45): ENC compare trigger and position match

46 (46): AOI output 0

47 (47): AOI output 1

48 (48): AOI output 2

49 (49): AOI output 3

50 (50): PIT trigger 2

51 (51): PIT trigger 3

52 (52): PWMB channel 0 trigger 0 or trigger 1

53 (53): PWMB channel 1 trigger 0 or trigger 1

54 (54): PWMB channel 2 trigger 0 or trigger 1

55 (55): PWMB channel 3 trigger 0 or trigger 1

56 (56): FTM2 all channels output compare ORed together

57 (57): FTM2 all channels counter init ORed together

Input (XBARA_INn) to be muxed to XBARA_OUT57 (refer to Functional Description section for input/output assignment)

0 (0): Logic zero

1 (1): Logic one

2 (2): XBAR0_IN2 input pin

3 (3): XBAR0_IN3 input pin

4 (4): XBAR0_IN4 input pin

5 (5): XBAR0_IN5 input pin

6 (6): XBAR0_IN6 input pin

7 (7): XBAR0_IN7 input pin

8 (8): XBAR0_IN8 input pin

9 (9): XBAR0_IN9 input pin

10 (10): XBAR0_IN10 input pin

11 (11): XBAR0_IN11 input pin

12 (12): CMP0 Output

13 (13): CMP1 Output

14 (14): CMP2 Output

15 (15): CMP3 Output

16 (16): FTM0 all channels output compare ORed together

17 (17): FTM0 all channels counter init ORed together

18 (18): FTM3 all channels output compare ORed together

19 (19): FTM3 all channels counter init ORed together

20 (20): PWMA channel 0 trigger 0

21 (21): PWMA channel 0 trigger 1

22 (22): PWMA channel 1 trigger 0

23 (23): PWMA channel 1 trigger 1

24 (24): PWMA channel 2 trigger 0

25 (25): PWMA channel 2 trigger 1

26 (26): PWMA channel 3 trigger 0

27 (27): PWMA channel 3 trigger 1

28 (28): PDB0 channel 1 output trigger

29 (29): PDB0 channel 0 output trigger

30 (30): PDB1 channel 1 output trigger

31 (31): PDB1 channel 0 output trigger

32 (32): High Speed Analog-to-Digital Converter 1 conversion A complete

33 (33): High Speed Analog-to-Digital Converter 0 conversion A complete

34 (34): High Speed Analog-to-Digital Converter 1 conversion B complete

35 (35): High Speed Analog-to-Digital Converter 0 conversion B complete

36 (36): FTM1 all channels output compare ORed together

37 (37): FTM1 all channels counter init ORed together

38 (38): DMA channel 0 done

39 (39): DMA channel 1 done

40 (40): DMA channel 6 done

41 (41): DMA channel 7 done

42 (42): PIT trigger 0

43 (43): PIT trigger 1

44 (44): Analog-to-Digital Converter 0 conversion complete

45 (45): ENC compare trigger and position match

46 (46): AOI output 0

47 (47): AOI output 1

48 (48): AOI output 2

49 (49): AOI output 3

50 (50): PIT trigger 2

51 (51): PIT trigger 3

52 (52): PWMB channel 0 trigger 0 or trigger 1

53 (53): PWMB channel 1 trigger 0 or trigger 1

54 (54): PWMB channel 2 trigger 0 or trigger 1

55 (55): PWMB channel 3 trigger 0 or trigger 1

56 (56): FTM2 all channels output compare ORed together

57 (57): FTM2 all channels counter init ORed together